• Mead-Conway VLSI Design Approach and System Design Challenges Ahead
  Lynn Conway
  University of Michigan
  
  
• Alternative Architectures for Video Processing
  Wayne Wolf
  Princeton University
  
  
• PicoRadio: Ad-hoc Wireless Networking of Ubiquitous Low-Energy Sensor/Monitor Nodes
  Jan Rabaey, . Ammer, J. L. da Silva Jr. and D Patel
  University of California at Berkeley
  
  

• A System-Level Approach to Power/Performance Optimization in Wearable Computers
  Asim Smailagic and Dan Siewiorek
  Carnegie Mellon University
  
  
• Design for Testability
  Yervant Zorian
  Logic Vision Inc.
  
  
• Multilanguage Design of a Robot Arm Controller
  G. Nicolescu, P. Coste, F. Hessel, P. LeMarrec, A.A. Jerraya
  TIMA-CMP Laboratory, Grenoble, France
  
  

• Instruction Scheduling Based on Energy and Performance Constraints
  A. Parikh, M. Kandemir, N. Vijaykrishnan and M.J. Irwin
  The Pennsylvania State University
  
  
• Dynamic Voltage Scaling Techniques for Distributed Microsensor Networks
  Rex Min, Travis Furrer and Anantha Chandrakasan
  Massachusetts Institute of Technology
  
  
• Reducing Power Consumption in FPGAs with Keeping a High Performance Level
  Andres Garcia, Wayne Burleson and Jean Luc Danger
  Ecole Nationale Superieure des Telecommunications, France, and Univ. of Massachusetts
  
  
• Multiple Access Caches: Energy Implications
  H.Y. Kim, N. Vijaykrishnan, M. Kandemir and M.J. Irwin
  The Pennsylvania State University
  
  
  

• Architectural Adaptation in AMRM
  Rajesh Gupta
  University of California at Irvine
  
  
• Improved Synchronization Methodologies for High Performance Digital Systems
  Sean Welch and Kevin Kornegay
  Cornell University
  
  
• Algorithm-Based Low Power VLSI Architecture for 2D-Mesh Video Object Motion Tracking
  Wael Badawy and Magdy Bayoumi
  University of Louisiana
  
  

Friday April 28, 2000

• Specification and Validation of Information Processing Systems by
  Process Encapsulation and Symbolic Execution
  Wolfgang Bossung, Thomas Geyer, Sorin A. Huss, and Lars Wehmeyer
  Darmstadt University of Technology, Germany
  
  
• Interaction in Language Based System Level Design Using an Advanced
  Compiler Generator Environment
  I. Poulakis, G. Economakos and P. Tsanakas
  National Technical University of Athens, Greece
  
  
• On Design-For-Reusability in HDL
  Morris Chang, Kagan Agun
  Illinois Institute of Technology
  
  
  

• Fine-Grain Pipelined Asynchronous Adders for High-Speed DSP Applications
  Montek Singh and Steven M. Nowick
  Columbia University
  
  
• A Low-Latency FIFO for Mixed-Clock Systems
  Tiberiu Chelcea and Steven M.Nowick
  Columbia University
  
  

• A Reconfigurable Low Energy Multiplier for Multimedia System Design
  Suhwan Kim and Marios Papaefthymiou
  University of Michigan
  
  
• An Algorithmic Approach to Building Datapath Multipliers Using (3,2) Counters
  Hesham Al-Twaijry and M. Al-Oqeely
  Stanford and King Saud University
  
  

• RT-Level Interconnect Optimization in DSM Regime
  Srinivas Katkoori and Stelian Alupoaei
  University of South Florida
  
  
• An Empirical And Analytical Comparison of Delay Elements And A New Delay Element Design
  Nihar Mahapatra, Sriram Garimella, and Alwin Tareen
  SUNY at Buffalo and Seagate Technology
  
  
• Validation of Complex Designs Using Hardware Prototyping
  Gil Stoler
  Intel Corporation
  
  
• On-line Error Detection in Multiplexor Based FPGAs
  Arunita Jaekel
  University of Windsor, Canada
  
  
• Diode String ESD Protection Circuit Layout Optimization
  Q. Li, T. Li, J.S. Lee, S.M. Kang
  University of Illinois at Urbana-Champaign and Avant!